The present invention relates to improvements in motor driving and control circuitry, and is more specifically related to an improved circuit and method for back electromotive force (emf) detection in a polyphase direct current (dc) motor, or the like.
Three phase dc motors, particularly brushless, sensorless, three phase dc motors, are popular in drives in information retrieval systems that use rotating recording media, such as discs. Conventional disc drives are used to both record and to retrieve information. As discs become more prevalent as the medium of choice for storing information in both computer and home entertainment equipment, disc drives likewise become more prevalent and important components of such electronic systems.
In addition to the recording media, a disc drive typically includes a read/write assembly and a spindle motor assembly. The read/write assembly is adapted to transfer data between the disc and an external system, or device, such as a microprocessor. The spindle motor assembly carries the information storage discs and is arranged to rotate the discs.
A conventional motor can be viewed as having three coils A, B, and C connected in a "Y" configuration, as shown in FIG. 1, although a larger number of stator coils are usually employed with multiple rotor poles. Typically, in such applications, eight pole motors are used having twelve stator windings and four N-S magnetic sets on the rotor, resulting in four electrical cycles per revolution of the rotor. The stator coils, however, can be analyzed in terms of three "Y" connected coils, connected in three sets of four coils, each physically separated by 90.degree..
During operation, coils A, B and C are energized with a drive signal that causes electromagnetic fields to develop about the coils. The resulting attraction/repulsion between the electromagnetic fields of the coils A, B, and C and the magnetic fields created by the magnets in the motor causes the rotor assembly of the motor to rotate. While rotating, the rotor assembly causes a back emf signal to be generated in the coils A, B and C due to the movement of the magnets in relation to the coils A, B and C.
The coils are energized in sequences to produce a current path through two coils of the "Y", with the third coil left floating, hereinafter floating coil FC. The sequences are arranged so that as the current paths are changed, or commutated, one of the coils of the current path is switched to float, and the previously floating coil is switched into the current path. The sequences are defined such that when the floating coil is switched into the current path, the direction of the current in the coil that was included in the prior current path is not changed. In this manner, six commutation sequences, or phases, are defined for each electrical cycle in a three phase motor, as shown in Table A.
TABLE A ______________________________________ Current flows Phase From: To: Floating Coil ______________________________________ 1 A B C 2 A C B 3 B C A 4 B A C 5 C A B 6 C B A ______________________________________
FIG. 2 shows a typical architecture of the motor 34 and a driver circuit 10 for driving the motor 34. Individual elements shown in FIG. 2 are suitably made in accordance with prior practice, as described in detail in U.S. Pat. Nos. 5,317,243 and 5,294,877 which are incorporated into this specification by reference. Specifically, the motor 34 consists of the stator 36 driven by the driver circuit 10. Although the driver circuit 10 can be constructed of discrete components, preferably, the driver circuit 10 is integrated onto a single semiconductor chip adapted for connection to the stator coils 26a, 26b, and 26c of a three phase dc brushless spindle motor. The stator coils 26a, 26b, and 26c are connected to output nodes OUTA, OUTB, OUTC and CT28. One end of each of the coils 26a, 26b, 26c is connected to the common center tap 28. The outer end is connected to one of the output nodes respectively designated, OUTA, OUTB, OUTC, which are connected to a power stage 11.
Referring to FIG. 3, a driving voltage is provided to the stator coils 26a, 26b, and 26c by the power stage 11, which is configured to have one high side driver 50a, 50b, 50c, and one low side driver 52a, 52b, 52c, for each of the stator coils 26a, 26b, and 26c. Referring again to FIG. 2, the power stage 11 is sequenced to provide sequential control output signals to the stator coils 26a, 26b, and 26c by a sequencer circuit 13. A signal interface circuit 12 supplies the output signals from the sequencer circuit 13 to the power stage 11, as well as enabling other functions, such as brake and output enable functions. The sequencer circuit 13 also provides drive signals to other circuits of the driver circuit 10 through sequence decode and output switches 15 to control the various aspects of rotation of the motor 34.
The stator coils 26a, 26b, and 26c are switchably connected to a back emf amplifier 14. The back emf amplifier 14 in turn delivers signals to a zero crossing detector 16, which provides input signals to a digital timing circuit 17. The output of the mask counter of the digital timing circuit 17 controls the operation of the sequencer circuit 13.
The driver circuit 10 includes system clock circuitry 23, phase lock loop (PLL) frequency/phase detector circuitry 24, a PWM drive 18 to support pulse width modulation operation mode of the motor, and may include various other circuitry, not shown, such as "align and go" start up circuitry to facilitate start up of the motor from a stopped condition, port control logic and associated shift register circuitry to facilitate control of the driver circuit 10 by an external microprocessor (not shown), and so forth.
The switching of the driver transistors of the power stage 11 to effect the switching currents for each phase is accomplished by the sequencer circuit 13. The sequencer circuit 13 provides signals to the high side drivers and the low side drivers to accomplish the switching sequence outlined above in Table A.
The commutation among the stator coils 26a, 26b, and 26c is performed in response to information indicating the specific position of the rotor 38 in conjunction with circuit information indicating the desired position of the rotor 38. More specifically, the commutation to apply the next drive sequence of Table A is determined in response to a corresponding coil reaching a particular rotational position and its correlation with sequencer information indicating where the motor 34 should be when a commutation is to occur. The determination of the precise rotational location of the rotor 38 is continuously being determined by monitoring the zero crossing voltage in each non-driven, or floating, stator coil. More particularly, as the stator coils 26a, 26b, and 26c are switched during the commutation sequence of the rotor 38, the voltage of the floating coil is monitored by the back emf amplifier 14.
During the operation of such a polyphase dc motor, maintaining a known position of the rotor 38 is an important concern. This can be implemented in various ways. One widely used way, for example, has been to start the motor in a known position, then derive information related to the instantaneous or current position of the rotor 38. Such instantaneous position information can be derived during the commutation process by identifying the floating coil and monitoring its back emf, that is, the emf induced into the coil as it moves through the magnetic field provided by the stator 36.
When the voltage of the floating coil crosses zero (referred to in the art as "a zero crossing"), the position of the rotor 38 is assumed to be known. Upon the occurrence of this event, the commutation sequence is incremented to the next phase, and the process repeated. The assumption that the zero crossing accurately indicates the rotor position is generally true if the motor 34 is functioning properly.
Referring again to FIG. 3, the sequence decode and output switches circuit 15 includes switches 56a, 56b, 56c connected to the stator coils 26a, 26b and 26c through the output nodes OUTA, OUTB, and OUTC to apply a selected one of the output nodes OUTA, OUTB, or OUTC (particularly the output node of the floating coil FC) to the non-inverting input of a comparator 65 in the back emf amplifier. The particular one of the output nodes OUTA, OUTB or OUTC which is applied to the comparator 65 corresponds to whichever of coils 26a, 26b, and 26c is expected to be floating (not the coil which is actually floating). Although the term "floating" is used herein to indicate the coil that is not in the instantaneous current path, the coil does not actually "float", but is connected to a tristate impedance. The center tap 28 of the stator is connected to the inverting input of the comparator 65, so that when the voltage on the selected floating coil becomes larger than the center tap voltage, the comparator changes states, representing the zero crossing of the voltage on the selected floating coil. When the voltage on the floating coil becomes smaller than the center tap voltage, the comparator again changes states, representing the zero crossing of the voltage on the selected floating coil. (The voltage on the floating coil is the so-called the back emf of the floating coil.) The comparator 65 is designed to have hysteresis, because the occurrence of a voltage beyond the zero crossing voltage may not last a sufficiently long time to enable the output signal of the comparator 65 to be useful.
A sense resistor 54 is coupled to between the low side drivers 52a, 52b, 52c and ground to control the current on the coils. The voltage on the sense resistor 54 is measured to determine the current on the coils 26a, 26b, 26c; if the current is too high the current is reduced and if it is too low it is increased.
Reducing the power consumed by the motor has long been a goal in the disc drive industry. One way to significantly reduce the power is to operate the motor in pulse width modulation (PWM) mode. The PWM mode is a nonlinear mode with discontinuities in application of drive current to the coils 26a, 26b, 26c. The power to the coils follows in the same overall pattern as in the linear mode but is chopped with alternating segments of on and off time as shown in FIG. 4. The frequency of on-off times in a PWM mode can typically vary from 25 kHz to 100 kHz. In a typical on-off cycle, lasting about 20 .mu.s, there may be 14 .mu.s of on time followed by 6 .mu.s of off time.
In operation, during the on time of a PWM cycle, one output node, for example node OUTA, is driven high by one of the high side drivers 50a. One output node, for example node OUTB, is driven low by one of the low side drivers 52b. The third output node, for example node C, is left floating. This is commonly referred to as the "AB phase". The coils are then switched in a commutation sequence determined by the sequencer circuit 13 in a manner such that in each commutation phase current always flows in two of the three coils, with the third coil floating, and that after switching current will continue to flow, and in the same direction, in one of the two coils in which current was flowing in the previous phase to generate the six phases shown in Table A.
During the off time the high side driver 50a that was on is turned off and its corresponding low side driver 52a is turned on to recirculate the current flowing through the coils 26a, 26b. The low side driver 52b that was on during the on cycle, remains on. Almost all of the current will flow through the low side drivers 52a 52b and practically no current will flow through the sense resistor 54, bringing the voltage at node V1 to zero. This also brings the voltage on the center tap 28 to zero. When the voltage on the center tap 28 is zero, it very difficult to detect a zero crossing. The comparator 65 has to compare the voltage on the center tap, which is now zero, and the voltage on the floating coil as it approaches zero during a zero crossing. This would require the comparator 65 that is compatible to ground and has excellent common mode rejection, which requires a more complicated and expensive comparator.
Therefore, typically the voltage on the center tap 28 and the floating coil 26c is only compared during the on time, so the zero crossing is detected only during an on time. If the output of the comparator 65 toggles between on times there is a back emf zero crossing sometime in between. Therefore, there is a delay between the real zero crossing occurrence and the detection of the zero crossing.
This delay presents a problem because the delay could be up to the entire off time of a PWM cycle. The delay between the occurrence and the detection of the zero crossing is the time when the signal crosses the time axis until the next on time. The lower the PWM frequency the worse it will be. The delay in detecting the zero crossing produces jitter in the motor and disrupts the speed control of the motor, which can cause damage to both the disc, the head, and the drive components.